处理AI胡乱生成的乱摊子
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26
vendor/golang.org/x/sys/cpu/cpu.go
generated
vendored
26
vendor/golang.org/x/sys/cpu/cpu.go
generated
vendored
@@ -72,6 +72,9 @@ var X86 struct {
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HasSSSE3 bool // Supplemental streaming SIMD extension 3
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HasSSE41 bool // Streaming SIMD extension 4 and 4.1
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HasSSE42 bool // Streaming SIMD extension 4 and 4.2
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HasAVXIFMA bool // Advanced vector extension Integer Fused Multiply Add
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HasAVXVNNI bool // Advanced vector extension Vector Neural Network Instructions
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HasAVXVNNIInt8 bool // Advanced vector extension Vector Neural Network Int8 instructions
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_ CacheLinePad
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}
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@@ -146,6 +149,18 @@ var ARM struct {
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_ CacheLinePad
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}
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// The booleans in Loong64 contain the correspondingly named cpu feature bit.
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// The struct is padded to avoid false sharing.
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var Loong64 struct {
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_ CacheLinePad
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HasLSX bool // support 128-bit vector extension
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HasLASX bool // support 256-bit vector extension
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HasCRC32 bool // support CRC instruction
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HasLAM_BH bool // support AM{SWAP/ADD}[_DB].{B/H} instruction
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HasLAMCAS bool // support AMCAS[_DB].{B/H/W/D} instruction
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_ CacheLinePad
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}
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// MIPS64X contains the supported CPU features of the current mips64/mips64le
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// platforms. If the current platform is not mips64/mips64le or the current
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// operating system is not Linux then all feature flags are false.
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@@ -217,6 +232,17 @@ var RISCV64 struct {
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HasZba bool // Address generation instructions extension
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HasZbb bool // Basic bit-manipulation extension
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HasZbs bool // Single-bit instructions extension
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HasZvbb bool // Vector Basic Bit-manipulation
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HasZvbc bool // Vector Carryless Multiplication
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HasZvkb bool // Vector Cryptography Bit-manipulation
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HasZvkt bool // Vector Data-Independent Execution Latency
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HasZvkg bool // Vector GCM/GMAC
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HasZvkn bool // NIST Algorithm Suite (AES/SHA256/SHA512)
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HasZvknc bool // NIST Algorithm Suite with carryless multiply
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HasZvkng bool // NIST Algorithm Suite with GCM
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HasZvks bool // ShangMi Algorithm Suite
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HasZvksc bool // ShangMi Algorithm Suite with carryless multiplication
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HasZvksg bool // ShangMi Algorithm Suite with GCM
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_ CacheLinePad
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}
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