460 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			Go
		
	
	
	
	
	
			
		
		
	
	
			460 lines
		
	
	
		
			12 KiB
		
	
	
	
		
			Go
		
	
	
	
	
	
| // Code generated by parse_opcodes -go; DO NOT EDIT.
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| 
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| package riscv
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| 
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| import "github.com/twitchyliquid64/golang-asm/obj"
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| 
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| type inst struct {
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| 	opcode uint32
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| 	funct3 uint32
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| 	rs2    uint32
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| 	csr    int64
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| 	funct7 uint32
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| }
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| 
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| func encode(a obj.As) *inst {
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| 	switch a {
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| 	case ABEQ:
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| 		return &inst{0x63, 0x0, 0x0, 0, 0x0}
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| 	case ABNE:
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| 		return &inst{0x63, 0x1, 0x0, 0, 0x0}
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| 	case ABLT:
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| 		return &inst{0x63, 0x4, 0x0, 0, 0x0}
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| 	case ABGE:
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| 		return &inst{0x63, 0x5, 0x0, 0, 0x0}
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| 	case ABLTU:
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| 		return &inst{0x63, 0x6, 0x0, 0, 0x0}
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| 	case ABGEU:
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| 		return &inst{0x63, 0x7, 0x0, 0, 0x0}
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| 	case AJALR:
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| 		return &inst{0x67, 0x0, 0x0, 0, 0x0}
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| 	case AJAL:
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| 		return &inst{0x6f, 0x0, 0x0, 0, 0x0}
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| 	case ALUI:
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| 		return &inst{0x37, 0x0, 0x0, 0, 0x0}
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| 	case AAUIPC:
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| 		return &inst{0x17, 0x0, 0x0, 0, 0x0}
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| 	case AADDI:
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| 		return &inst{0x13, 0x0, 0x0, 0, 0x0}
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| 	case ASLLI:
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| 		return &inst{0x13, 0x1, 0x0, 0, 0x0}
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| 	case ASLTI:
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| 		return &inst{0x13, 0x2, 0x0, 0, 0x0}
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| 	case ASLTIU:
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| 		return &inst{0x13, 0x3, 0x0, 0, 0x0}
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| 	case AXORI:
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| 		return &inst{0x13, 0x4, 0x0, 0, 0x0}
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| 	case ASRLI:
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| 		return &inst{0x13, 0x5, 0x0, 0, 0x0}
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| 	case ASRAI:
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| 		return &inst{0x13, 0x5, 0x0, 1024, 0x20}
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| 	case AORI:
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| 		return &inst{0x13, 0x6, 0x0, 0, 0x0}
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| 	case AANDI:
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| 		return &inst{0x13, 0x7, 0x0, 0, 0x0}
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| 	case AADD:
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| 		return &inst{0x33, 0x0, 0x0, 0, 0x0}
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| 	case ASUB:
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| 		return &inst{0x33, 0x0, 0x0, 1024, 0x20}
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| 	case ASLL:
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| 		return &inst{0x33, 0x1, 0x0, 0, 0x0}
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| 	case ASLT:
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| 		return &inst{0x33, 0x2, 0x0, 0, 0x0}
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| 	case ASLTU:
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| 		return &inst{0x33, 0x3, 0x0, 0, 0x0}
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| 	case AXOR:
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| 		return &inst{0x33, 0x4, 0x0, 0, 0x0}
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| 	case ASRL:
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| 		return &inst{0x33, 0x5, 0x0, 0, 0x0}
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| 	case ASRA:
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| 		return &inst{0x33, 0x5, 0x0, 1024, 0x20}
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| 	case AOR:
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| 		return &inst{0x33, 0x6, 0x0, 0, 0x0}
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| 	case AAND:
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| 		return &inst{0x33, 0x7, 0x0, 0, 0x0}
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| 	case AADDIW:
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| 		return &inst{0x1b, 0x0, 0x0, 0, 0x0}
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| 	case ASLLIW:
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| 		return &inst{0x1b, 0x1, 0x0, 0, 0x0}
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| 	case ASRLIW:
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| 		return &inst{0x1b, 0x5, 0x0, 0, 0x0}
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| 	case ASRAIW:
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| 		return &inst{0x1b, 0x5, 0x0, 1024, 0x20}
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| 	case AADDW:
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| 		return &inst{0x3b, 0x0, 0x0, 0, 0x0}
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| 	case ASUBW:
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| 		return &inst{0x3b, 0x0, 0x0, 1024, 0x20}
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| 	case ASLLW:
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| 		return &inst{0x3b, 0x1, 0x0, 0, 0x0}
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| 	case ASRLW:
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| 		return &inst{0x3b, 0x5, 0x0, 0, 0x0}
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| 	case ASRAW:
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| 		return &inst{0x3b, 0x5, 0x0, 1024, 0x20}
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| 	case ALB:
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| 		return &inst{0x3, 0x0, 0x0, 0, 0x0}
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| 	case ALH:
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| 		return &inst{0x3, 0x1, 0x0, 0, 0x0}
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| 	case ALW:
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| 		return &inst{0x3, 0x2, 0x0, 0, 0x0}
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| 	case ALD:
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| 		return &inst{0x3, 0x3, 0x0, 0, 0x0}
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| 	case ALBU:
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| 		return &inst{0x3, 0x4, 0x0, 0, 0x0}
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| 	case ALHU:
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| 		return &inst{0x3, 0x5, 0x0, 0, 0x0}
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| 	case ALWU:
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| 		return &inst{0x3, 0x6, 0x0, 0, 0x0}
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| 	case ASB:
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| 		return &inst{0x23, 0x0, 0x0, 0, 0x0}
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| 	case ASH:
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| 		return &inst{0x23, 0x1, 0x0, 0, 0x0}
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| 	case ASW:
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| 		return &inst{0x23, 0x2, 0x0, 0, 0x0}
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| 	case ASD:
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| 		return &inst{0x23, 0x3, 0x0, 0, 0x0}
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| 	case AFENCE:
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| 		return &inst{0xf, 0x0, 0x0, 0, 0x0}
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| 	case AFENCEI:
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| 		return &inst{0xf, 0x1, 0x0, 0, 0x0}
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| 	case AMUL:
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| 		return &inst{0x33, 0x0, 0x0, 32, 0x1}
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| 	case AMULH:
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| 		return &inst{0x33, 0x1, 0x0, 32, 0x1}
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| 	case AMULHSU:
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| 		return &inst{0x33, 0x2, 0x0, 32, 0x1}
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| 	case AMULHU:
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| 		return &inst{0x33, 0x3, 0x0, 32, 0x1}
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| 	case ADIV:
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| 		return &inst{0x33, 0x4, 0x0, 32, 0x1}
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| 	case ADIVU:
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| 		return &inst{0x33, 0x5, 0x0, 32, 0x1}
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| 	case AREM:
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| 		return &inst{0x33, 0x6, 0x0, 32, 0x1}
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| 	case AREMU:
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| 		return &inst{0x33, 0x7, 0x0, 32, 0x1}
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| 	case AMULW:
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| 		return &inst{0x3b, 0x0, 0x0, 32, 0x1}
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| 	case ADIVW:
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| 		return &inst{0x3b, 0x4, 0x0, 32, 0x1}
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| 	case ADIVUW:
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| 		return &inst{0x3b, 0x5, 0x0, 32, 0x1}
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| 	case AREMW:
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| 		return &inst{0x3b, 0x6, 0x0, 32, 0x1}
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| 	case AREMUW:
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| 		return &inst{0x3b, 0x7, 0x0, 32, 0x1}
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| 	case AAMOADDW:
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| 		return &inst{0x2f, 0x2, 0x0, 0, 0x0}
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| 	case AAMOXORW:
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| 		return &inst{0x2f, 0x2, 0x0, 512, 0x10}
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| 	case AAMOORW:
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| 		return &inst{0x2f, 0x2, 0x0, 1024, 0x20}
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| 	case AAMOANDW:
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| 		return &inst{0x2f, 0x2, 0x0, 1536, 0x30}
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| 	case AAMOMINW:
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| 		return &inst{0x2f, 0x2, 0x0, -2048, 0x40}
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| 	case AAMOMAXW:
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| 		return &inst{0x2f, 0x2, 0x0, -1536, 0x50}
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| 	case AAMOMINUW:
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| 		return &inst{0x2f, 0x2, 0x0, -1024, 0x60}
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| 	case AAMOMAXUW:
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| 		return &inst{0x2f, 0x2, 0x0, -512, 0x70}
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| 	case AAMOSWAPW:
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| 		return &inst{0x2f, 0x2, 0x0, 128, 0x4}
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| 	case ALRW:
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| 		return &inst{0x2f, 0x2, 0x0, 256, 0x8}
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| 	case ASCW:
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| 		return &inst{0x2f, 0x2, 0x0, 384, 0xc}
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| 	case AAMOADDD:
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| 		return &inst{0x2f, 0x3, 0x0, 0, 0x0}
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| 	case AAMOXORD:
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| 		return &inst{0x2f, 0x3, 0x0, 512, 0x10}
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| 	case AAMOORD:
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| 		return &inst{0x2f, 0x3, 0x0, 1024, 0x20}
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| 	case AAMOANDD:
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| 		return &inst{0x2f, 0x3, 0x0, 1536, 0x30}
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| 	case AAMOMIND:
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| 		return &inst{0x2f, 0x3, 0x0, -2048, 0x40}
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| 	case AAMOMAXD:
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| 		return &inst{0x2f, 0x3, 0x0, -1536, 0x50}
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| 	case AAMOMINUD:
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| 		return &inst{0x2f, 0x3, 0x0, -1024, 0x60}
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| 	case AAMOMAXUD:
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| 		return &inst{0x2f, 0x3, 0x0, -512, 0x70}
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| 	case AAMOSWAPD:
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| 		return &inst{0x2f, 0x3, 0x0, 128, 0x4}
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| 	case ALRD:
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| 		return &inst{0x2f, 0x3, 0x0, 256, 0x8}
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| 	case ASCD:
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| 		return &inst{0x2f, 0x3, 0x0, 384, 0xc}
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| 	case AECALL:
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| 		return &inst{0x73, 0x0, 0x0, 0, 0x0}
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| 	case AEBREAK:
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| 		return &inst{0x73, 0x0, 0x1, 1, 0x0}
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| 	case AURET:
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| 		return &inst{0x73, 0x0, 0x2, 2, 0x0}
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| 	case ASRET:
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| 		return &inst{0x73, 0x0, 0x2, 258, 0x8}
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| 	case AMRET:
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| 		return &inst{0x73, 0x0, 0x2, 770, 0x18}
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| 	case ADRET:
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| 		return &inst{0x73, 0x0, 0x12, 1970, 0x3d}
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| 	case ASFENCEVMA:
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| 		return &inst{0x73, 0x0, 0x0, 288, 0x9}
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| 	case AWFI:
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| 		return &inst{0x73, 0x0, 0x5, 261, 0x8}
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| 	case ACSRRW:
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| 		return &inst{0x73, 0x1, 0x0, 0, 0x0}
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| 	case ACSRRS:
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| 		return &inst{0x73, 0x2, 0x0, 0, 0x0}
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| 	case ACSRRC:
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| 		return &inst{0x73, 0x3, 0x0, 0, 0x0}
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| 	case ACSRRWI:
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| 		return &inst{0x73, 0x5, 0x0, 0, 0x0}
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| 	case ACSRRSI:
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| 		return &inst{0x73, 0x6, 0x0, 0, 0x0}
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| 	case ACSRRCI:
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| 		return &inst{0x73, 0x7, 0x0, 0, 0x0}
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| 	case AHFENCEVVMA:
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| 		return &inst{0x73, 0x0, 0x0, 544, 0x11}
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| 	case AHFENCEGVMA:
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| 		return &inst{0x73, 0x0, 0x0, 1568, 0x31}
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| 	case AFADDS:
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| 		return &inst{0x53, 0x0, 0x0, 0, 0x0}
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| 	case AFSUBS:
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| 		return &inst{0x53, 0x0, 0x0, 128, 0x4}
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| 	case AFMULS:
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| 		return &inst{0x53, 0x0, 0x0, 256, 0x8}
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| 	case AFDIVS:
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| 		return &inst{0x53, 0x0, 0x0, 384, 0xc}
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| 	case AFSGNJS:
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| 		return &inst{0x53, 0x0, 0x0, 512, 0x10}
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| 	case AFSGNJNS:
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| 		return &inst{0x53, 0x1, 0x0, 512, 0x10}
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| 	case AFSGNJXS:
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| 		return &inst{0x53, 0x2, 0x0, 512, 0x10}
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| 	case AFMINS:
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| 		return &inst{0x53, 0x0, 0x0, 640, 0x14}
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| 	case AFMAXS:
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| 		return &inst{0x53, 0x1, 0x0, 640, 0x14}
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| 	case AFSQRTS:
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| 		return &inst{0x53, 0x0, 0x0, 1408, 0x2c}
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| 	case AFADDD:
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| 		return &inst{0x53, 0x0, 0x0, 32, 0x1}
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| 	case AFSUBD:
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| 		return &inst{0x53, 0x0, 0x0, 160, 0x5}
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| 	case AFMULD:
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| 		return &inst{0x53, 0x0, 0x0, 288, 0x9}
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| 	case AFDIVD:
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| 		return &inst{0x53, 0x0, 0x0, 416, 0xd}
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| 	case AFSGNJD:
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| 		return &inst{0x53, 0x0, 0x0, 544, 0x11}
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| 	case AFSGNJND:
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| 		return &inst{0x53, 0x1, 0x0, 544, 0x11}
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| 	case AFSGNJXD:
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| 		return &inst{0x53, 0x2, 0x0, 544, 0x11}
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| 	case AFMIND:
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| 		return &inst{0x53, 0x0, 0x0, 672, 0x15}
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| 	case AFMAXD:
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| 		return &inst{0x53, 0x1, 0x0, 672, 0x15}
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| 	case AFCVTSD:
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| 		return &inst{0x53, 0x0, 0x1, 1025, 0x20}
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| 	case AFCVTDS:
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| 		return &inst{0x53, 0x0, 0x0, 1056, 0x21}
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| 	case AFSQRTD:
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| 		return &inst{0x53, 0x0, 0x0, 1440, 0x2d}
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| 	case AFADDQ:
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| 		return &inst{0x53, 0x0, 0x0, 96, 0x3}
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| 	case AFSUBQ:
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| 		return &inst{0x53, 0x0, 0x0, 224, 0x7}
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| 	case AFMULQ:
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| 		return &inst{0x53, 0x0, 0x0, 352, 0xb}
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| 	case AFDIVQ:
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| 		return &inst{0x53, 0x0, 0x0, 480, 0xf}
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| 	case AFSGNJQ:
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| 		return &inst{0x53, 0x0, 0x0, 608, 0x13}
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| 	case AFSGNJNQ:
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| 		return &inst{0x53, 0x1, 0x0, 608, 0x13}
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| 	case AFSGNJXQ:
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| 		return &inst{0x53, 0x2, 0x0, 608, 0x13}
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| 	case AFMINQ:
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| 		return &inst{0x53, 0x0, 0x0, 736, 0x17}
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| 	case AFMAXQ:
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| 		return &inst{0x53, 0x1, 0x0, 736, 0x17}
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| 	case AFCVTSQ:
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| 		return &inst{0x53, 0x0, 0x3, 1027, 0x20}
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| 	case AFCVTQS:
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| 		return &inst{0x53, 0x0, 0x0, 1120, 0x23}
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| 	case AFCVTDQ:
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| 		return &inst{0x53, 0x0, 0x3, 1059, 0x21}
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| 	case AFCVTQD:
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| 		return &inst{0x53, 0x0, 0x1, 1121, 0x23}
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| 	case AFSQRTQ:
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| 		return &inst{0x53, 0x0, 0x0, 1504, 0x2f}
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| 	case AFLES:
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| 		return &inst{0x53, 0x0, 0x0, -1536, 0x50}
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| 	case AFLTS:
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| 		return &inst{0x53, 0x1, 0x0, -1536, 0x50}
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| 	case AFEQS:
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| 		return &inst{0x53, 0x2, 0x0, -1536, 0x50}
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| 	case AFLED:
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| 		return &inst{0x53, 0x0, 0x0, -1504, 0x51}
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| 	case AFLTD:
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| 		return &inst{0x53, 0x1, 0x0, -1504, 0x51}
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| 	case AFEQD:
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| 		return &inst{0x53, 0x2, 0x0, -1504, 0x51}
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| 	case AFLEQ:
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| 		return &inst{0x53, 0x0, 0x0, -1440, 0x53}
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| 	case AFLTQ:
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| 		return &inst{0x53, 0x1, 0x0, -1440, 0x53}
 | |
| 	case AFEQQ:
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| 		return &inst{0x53, 0x2, 0x0, -1440, 0x53}
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| 	case AFCVTWS:
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| 		return &inst{0x53, 0x0, 0x0, -1024, 0x60}
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| 	case AFCVTWUS:
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| 		return &inst{0x53, 0x0, 0x1, -1023, 0x60}
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| 	case AFCVTLS:
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| 		return &inst{0x53, 0x0, 0x2, -1022, 0x60}
 | |
| 	case AFCVTLUS:
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| 		return &inst{0x53, 0x0, 0x3, -1021, 0x60}
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| 	case AFMVXW:
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| 		return &inst{0x53, 0x0, 0x0, -512, 0x70}
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| 	case AFCLASSS:
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| 		return &inst{0x53, 0x1, 0x0, -512, 0x70}
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| 	case AFCVTWD:
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| 		return &inst{0x53, 0x0, 0x0, -992, 0x61}
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| 	case AFCVTWUD:
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| 		return &inst{0x53, 0x0, 0x1, -991, 0x61}
 | |
| 	case AFCVTLD:
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| 		return &inst{0x53, 0x0, 0x2, -990, 0x61}
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| 	case AFCVTLUD:
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| 		return &inst{0x53, 0x0, 0x3, -989, 0x61}
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| 	case AFMVXD:
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| 		return &inst{0x53, 0x0, 0x0, -480, 0x71}
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| 	case AFCLASSD:
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| 		return &inst{0x53, 0x1, 0x0, -480, 0x71}
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| 	case AFCVTWQ:
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| 		return &inst{0x53, 0x0, 0x0, -928, 0x63}
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| 	case AFCVTWUQ:
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| 		return &inst{0x53, 0x0, 0x1, -927, 0x63}
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| 	case AFCVTLQ:
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| 		return &inst{0x53, 0x0, 0x2, -926, 0x63}
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| 	case AFCVTLUQ:
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| 		return &inst{0x53, 0x0, 0x3, -925, 0x63}
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| 	case AFMVXQ:
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| 		return &inst{0x53, 0x0, 0x0, -416, 0x73}
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| 	case AFCLASSQ:
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| 		return &inst{0x53, 0x1, 0x0, -416, 0x73}
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| 	case AFCVTSW:
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| 		return &inst{0x53, 0x0, 0x0, -768, 0x68}
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| 	case AFCVTSWU:
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| 		return &inst{0x53, 0x0, 0x1, -767, 0x68}
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| 	case AFCVTSL:
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| 		return &inst{0x53, 0x0, 0x2, -766, 0x68}
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| 	case AFCVTSLU:
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| 		return &inst{0x53, 0x0, 0x3, -765, 0x68}
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| 	case AFMVWX:
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| 		return &inst{0x53, 0x0, 0x0, -256, 0x78}
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| 	case AFCVTDW:
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| 		return &inst{0x53, 0x0, 0x0, -736, 0x69}
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| 	case AFCVTDWU:
 | |
| 		return &inst{0x53, 0x0, 0x1, -735, 0x69}
 | |
| 	case AFCVTDL:
 | |
| 		return &inst{0x53, 0x0, 0x2, -734, 0x69}
 | |
| 	case AFCVTDLU:
 | |
| 		return &inst{0x53, 0x0, 0x3, -733, 0x69}
 | |
| 	case AFMVDX:
 | |
| 		return &inst{0x53, 0x0, 0x0, -224, 0x79}
 | |
| 	case AFCVTQW:
 | |
| 		return &inst{0x53, 0x0, 0x0, -672, 0x6b}
 | |
| 	case AFCVTQWU:
 | |
| 		return &inst{0x53, 0x0, 0x1, -671, 0x6b}
 | |
| 	case AFCVTQL:
 | |
| 		return &inst{0x53, 0x0, 0x2, -670, 0x6b}
 | |
| 	case AFCVTQLU:
 | |
| 		return &inst{0x53, 0x0, 0x3, -669, 0x6b}
 | |
| 	case AFMVQX:
 | |
| 		return &inst{0x53, 0x0, 0x0, -160, 0x7b}
 | |
| 	case AFLW:
 | |
| 		return &inst{0x7, 0x2, 0x0, 0, 0x0}
 | |
| 	case AFLD:
 | |
| 		return &inst{0x7, 0x3, 0x0, 0, 0x0}
 | |
| 	case AFLQ:
 | |
| 		return &inst{0x7, 0x4, 0x0, 0, 0x0}
 | |
| 	case AFSW:
 | |
| 		return &inst{0x27, 0x2, 0x0, 0, 0x0}
 | |
| 	case AFSD:
 | |
| 		return &inst{0x27, 0x3, 0x0, 0, 0x0}
 | |
| 	case AFSQ:
 | |
| 		return &inst{0x27, 0x4, 0x0, 0, 0x0}
 | |
| 	case AFMADDS:
 | |
| 		return &inst{0x43, 0x0, 0x0, 0, 0x0}
 | |
| 	case AFMSUBS:
 | |
| 		return &inst{0x47, 0x0, 0x0, 0, 0x0}
 | |
| 	case AFNMSUBS:
 | |
| 		return &inst{0x4b, 0x0, 0x0, 0, 0x0}
 | |
| 	case AFNMADDS:
 | |
| 		return &inst{0x4f, 0x0, 0x0, 0, 0x0}
 | |
| 	case AFMADDD:
 | |
| 		return &inst{0x43, 0x0, 0x0, 32, 0x1}
 | |
| 	case AFMSUBD:
 | |
| 		return &inst{0x47, 0x0, 0x0, 32, 0x1}
 | |
| 	case AFNMSUBD:
 | |
| 		return &inst{0x4b, 0x0, 0x0, 32, 0x1}
 | |
| 	case AFNMADDD:
 | |
| 		return &inst{0x4f, 0x0, 0x0, 32, 0x1}
 | |
| 	case AFMADDQ:
 | |
| 		return &inst{0x43, 0x0, 0x0, 96, 0x3}
 | |
| 	case AFMSUBQ:
 | |
| 		return &inst{0x47, 0x0, 0x0, 96, 0x3}
 | |
| 	case AFNMSUBQ:
 | |
| 		return &inst{0x4b, 0x0, 0x0, 96, 0x3}
 | |
| 	case AFNMADDQ:
 | |
| 		return &inst{0x4f, 0x0, 0x0, 96, 0x3}
 | |
| 	case ASLLIRV32:
 | |
| 		return &inst{0x13, 0x1, 0x0, 0, 0x0}
 | |
| 	case ASRLIRV32:
 | |
| 		return &inst{0x13, 0x5, 0x0, 0, 0x0}
 | |
| 	case ASRAIRV32:
 | |
| 		return &inst{0x13, 0x5, 0x0, 1024, 0x20}
 | |
| 	case AFRFLAGS:
 | |
| 		return &inst{0x73, 0x2, 0x1, 1, 0x0}
 | |
| 	case AFSFLAGS:
 | |
| 		return &inst{0x73, 0x1, 0x1, 1, 0x0}
 | |
| 	case AFSFLAGSI:
 | |
| 		return &inst{0x73, 0x5, 0x1, 1, 0x0}
 | |
| 	case AFRRM:
 | |
| 		return &inst{0x73, 0x2, 0x2, 2, 0x0}
 | |
| 	case AFSRM:
 | |
| 		return &inst{0x73, 0x1, 0x2, 2, 0x0}
 | |
| 	case AFSRMI:
 | |
| 		return &inst{0x73, 0x5, 0x2, 2, 0x0}
 | |
| 	case AFSCSR:
 | |
| 		return &inst{0x73, 0x1, 0x3, 3, 0x0}
 | |
| 	case AFRCSR:
 | |
| 		return &inst{0x73, 0x2, 0x3, 3, 0x0}
 | |
| 	case ARDCYCLE:
 | |
| 		return &inst{0x73, 0x2, 0x0, -1024, 0x60}
 | |
| 	case ARDTIME:
 | |
| 		return &inst{0x73, 0x2, 0x1, -1023, 0x60}
 | |
| 	case ARDINSTRET:
 | |
| 		return &inst{0x73, 0x2, 0x2, -1022, 0x60}
 | |
| 	case ARDCYCLEH:
 | |
| 		return &inst{0x73, 0x2, 0x0, -896, 0x64}
 | |
| 	case ARDTIMEH:
 | |
| 		return &inst{0x73, 0x2, 0x1, -895, 0x64}
 | |
| 	case ARDINSTRETH:
 | |
| 		return &inst{0x73, 0x2, 0x2, -894, 0x64}
 | |
| 	case ASCALL:
 | |
| 		return &inst{0x73, 0x0, 0x0, 0, 0x0}
 | |
| 	case ASBREAK:
 | |
| 		return &inst{0x73, 0x0, 0x1, 1, 0x0}
 | |
| 	case AFMVXS:
 | |
| 		return &inst{0x53, 0x0, 0x0, -512, 0x70}
 | |
| 	case AFMVSX:
 | |
| 		return &inst{0x53, 0x0, 0x0, -256, 0x78}
 | |
| 	case AFENCETSO:
 | |
| 		return &inst{0xf, 0x0, 0x13, -1997, 0x41}
 | |
| 	}
 | |
| 	return nil
 | |
| }
 |